The present disclosure relates to the field of a design structure for integrated circuit stacks. More specifically, the present disclosure relates to a design structure for logic dies and serializer-deserializer (SERDES) dies communicatively connected and stacked on a package substrate.
In general, integrated circuits may employ SERDES devices in order to convert inputs/outputs between parallel and serial interfaces and decrease the number of input/output pins and interconnects. As the speed of integrated circuits increases, the number of SERDES devices employed by integrated circuits increases and the need to optimally design and configure integrated circuit and SERDES devices communicatively connected similarly increases.